In recent years, semiconductor memory utilizing a variable resistive element as a storage element, for example, phase-change random access memory (PRAM), magnetic random access memory (MRAM) and others have attracted attention and have been developed. The MRAM is a device which utilizes a magnetoresistive effect to store “1” or “0” information in memory cells, thereby performing a memory operation. The above device simultaneously has features of a non-volatility, a high-speed operation, a high integrity and a high reliability, and therefore it is positioned as one of candidates of memory devices which can be used in place of SRAM, pseudo SRAM (PSRAM), DRAM and the like.
There have been reported a large number of MRAM using element indicating a tunneling magnetoresistive (TMR) effect in the magnetoresistive effect. As the TMR effect element, a magnetic tunnel junction (MTJ) element is usually used, and the MTJ element has a laminated structure including two ferromagnetic layers and a nonmagnetic layer sandwiched between these layers, and utilizes the change of a magnetic resistance by spin polarization tunnel effect. The MTJ element can take a low resistance state and a high resistance state owing to the magnetization arrangement of the two ferromagnetic layers. The low resistance state is defined as “0”, and the high resistance state is defined as “1”, whereby one bit data can be recorded in the MTJ element.
When writing is made in the MRAM, for example, a writing current flows through the MTJ element to change the magnetization arrangement of the MTJ element from a parallel state to an anti-parallel state or from the anti-parallel state to the parallel state in accordance with the direction of this writing current. For example, a usual 1Tr+1MTJ type memory cell has a connecting constitution in which one end of the MTJ element is connected to a first bit line, the other end of the MTJ element is connected to one source/drain region of a selection transistor, and the other source/drain region of the selection transistor is connected to a second bit line.
The conventional MRAM having such a constitution comprises memory cells each including an MTJ and a MOS transistor (the selection transistor). To reduce a cell area, the source area of the MOS transistor in each of the memory cells is shared with another memory cell adjacent to the source area. A common source line is disposed in a layer below the bit line. The bit line and the common source line are formed in separate processes, respectively.